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By The Linux Camp News, October 1, 2026
The proposed scheduler changes favor consistent placement within an Olympus core. NVIDIA reports OpenBLAS and NVPL gains on Vera, but the evidence covers a narrow matrix-multiplication test.
NVIDIA engineer Andrea Righi submitted v7 of a two-patch Linux scheduler series for Olympus SMT siblings on September 29, 2026. It aims to improve task placement on the cores used in Vera CPUs. This is a patch submission, not a released kernel feature: in the sources retrieved October 1, Phoronix described mainline integration as still pending, and no shipping kernel version was established. 2 1 3
Olympus exposes two symmetric processing elements, or SMT siblings, within each core. When just one is active, it can use the core's full resources; when both are active, they share those resources. The complication is the transition back: Righi describes a required idle qualification interval of 10 Ki cycles on the tested Vera system before full single-thread performance returns. A brief activation can therefore cost performance even after that sibling stops doing work. 2 4
Ordinary task placement can choose either sibling of an idle core. Alternating between them can keep the core sharing resources despite little useful overlap. The first patch makes the fair scheduler honor SD_ASYM_PACKING, a placement-priority policy, during idle selection within an SMT core. Existing placement and capacity rules still select the candidate core; the added step chooses its highest-priority available sibling. 2
The preference is about consistency, not finding a faster hardware thread. Both processing elements have equal steady-state capacity. Reusing one sibling gives the other longer uninterrupted idle periods, allowing the core to regain full-resource single-thread operation. For operators, the important distinction is that this targets placement-induced resource sharing, rather than increasing the core's underlying compute capacity. 2
Righi reports OpenBLAS throughput increasing from 7.11876 to 7.34669 TFLOP/s, a 3.20% gain, and NVIDIA Performance Libraries throughput increasing from 9.64742 to 10.29695 TFLOP/s, a 6.73% gain. Reported standard deviations also fell. These are the patch author's measurements, not independent Phoronix validation: that outlet explicitly said its separate Vera SMT benchmarks did not have these patches applied. 2 1 4
The test covered five runs per result of 88-thread single-precision matrix multiplication on 88 physical cores in NUMA node 0 of a two-node Vera system, with both siblings eligible. The enabled path was unchanged from v6, so these should not be presented as newly established v7 results. This evidence does not establish benefits for workloads occupying both siblings continuously, execution across nodes, or other applications. 2
For an evaluation kernel containing the series, the proposed boot option is sched_smt_asym_packing=on. It supplies an explicit fallback because Olympus firmware lacks an interface to describe the preferred sibling, according to the submission. Omitting the option preserves architecture- or firmware-supplied topology. That distinction matters when comparing tests: the option requests a policy that the platform otherwise may not supply. 2 4
Anyone carrying a v6 test configuration should check its boot-option value before moving to v7. The revision accepts only on and removes the earlier auto and off modes. In particular, omission preserves platform topology; it should not be interpreted as a universal switch to disable asymmetric SMT packing. 2 4