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By The Linux Camp News, October 23, 2026
Merged on October 20, the correction accounts for AMD's multiples-of-32 size encoding. It fixes reported TLB sizes, not hardware capacity, and also covers newer CPUs using the same encoding.
Linux's pull-request tracker confirmed on October 20, 2026 that the x86/cpu changes for v7.4-rc1 had merged into Linus Torvalds' tree. They include a correction for under-reported Translation Lookaside Buffer (TLB) sizes on AMD Zen 5 Ryzen and EPYC processors. This establishes inclusion in the Linux 7.4 development tree, not availability of a final 7.4 release. 4 1
The error concerns how Linux interprets a size value supplied by the processor. Zen 5 introduced reporting in multiples of 32: the value needs a scale calculation rather than being treated as the complete size. Phoronix reports that Linux had not checked the indicator bit or performed the corresponding calculation. The maintainer's pull summary confirms that the reporting code is being adjusted for this encoding. Missing that scale explains why the displayed sizes were too small. 3 2 1
The visible correction is in /proc/cpuinfo and similar interfaces. For engineers comparing hardware inventories, the practical inference is that a larger reported value after this fix need not indicate different hardware. Treat it as corrected reporting, not evidence of increased TLB capacity or a workload speedup. Phoronix also identifies Zen 6 and future AMD processors using the same indicator bit as covered; that scope is conditional on the encoding, not a verified list of every future model. 1 3
When checking an affected machine's reported size, /proc/cpuinfo is the documented place to inspect, but these sources provide no representative before-and-after values. As retrieved on October 23, 2026, the supplied reporting and merge summary also do not establish stable-kernel or distribution backport availability. They omit the exact indicator bit, affected TLB levels and page-size categories, so they cannot support a field-by-field validation procedure. 3 2